⬇️ Download this whole site to run offline (1‑click) no internet needed — unzip & open start-offline.command
37 pages

📘 Analog Circuit Design 12

GBW · Power · AreaGBW · Power · AreaGBW · Power · Area — 📘 Analog Circuit Design — gain bandwidth product GBW power area tradeoff op-amp opamp amplifier design space current budget figure of merit IBIS Model BuilderIBIS Model BuilderIBIS Model Builder — 📘 Analog Circuit Design — IBIS buffer model signal integrity I/O driver receiver IV curve VT waveform package parasitics .ibs Bode Plot SandboxBode Plot SandboxBode Plot Sandbox — 📘 Analog Circuit Design — Bode plot poles zeros magnitude phase margin gain margin transfer function frequency response stability compensation RC Noise Bandwidth · kT/CRC Noise Bandwidth · kT/CRC Noise Bandwidth · kT/C — 📘 Analog Circuit Design — thermal noise 4kTR kT/C equivalent noise bandwidth ENBW pi/2 1/(4RC) spot noise integrated rms quarter circle arctan brick wall Thevenin TIA SNR OTA Inverting AmpOTA Inverting AmpOTA Inverting Amp — 📘 Analog Circuit Design — OTA operational transconductance amplifier inverting closed loop gain feedback factor loading virtual ground Photodiode TIA · local filePhotodiode TIA · local filePhotodiode TIA · private repo — 📘 Analog Circuit Design — TIA transimpedance amplifier photodiode Rf Cf feedback capacitor Cp input capacitance noise gain 1/beta phase margin peaking GBW Zin Rf/A virtual ground private GitHub repo Inverter Self-BiasInverter Self-BiasInverter Self-Bias — 📘 Analog Circuit Design — self-biased CMOS inverter operating point V_M switching threshold VTC transfer curve unity gain feedback animation leakage droop settling Biquad SandboxBiquad SandboxBiquad Sandbox — 📘 Analog Circuit Design — biquad active filter low-pass high-pass band-pass notch Sallen-Key quality factor Q cutoff second order Crystal OscillatorCrystal OscillatorCrystal Oscillator — 📘 Analog Circuit Design — crystal oscillator quartz Pierce resonator negative resistance motional ESR load capacitance startup margin Ring Oscillator — Phase ModelRing Oscillator — Phase ModelRing Oscillator — Phase Model — 📘 Analog Circuit Design — ring oscillator phase model VCO jitter phase noise delay stage inverter chain period Delay-Locked Loop · local fileDelay-Locked Loop · local fileDelay-Locked Loop · private repo — 📘 Analog Circuit Design — DLL delay-locked loop VCDL voltage-controlled delay line phase detector PFD XOR charge pump loop filter first-order loop gain Icp Kdl/C harmonic lock false lock start-up 90 degree clock alignment grumPy WorMgrumPy WorMgrumPy WorM — 📘 Analog Circuit Design — PWM pulse width modulation delta-sigma data converter teaching toy flappy game duty cycle

📗 Device Physics 2

gm/Id First-Order Estimatorgm/Id First-Order Estimatorgm/Id First-Order Estimator — 📗 Device Physics — gm/Id transconductance efficiency MOSFET sizing inversion level weak strong Vdsat headroom process node first-order ESD — Protection & Debug HubESD — Protection & Debug HubESD — Protection & Debug Hub — 📗 Device Physics — ESD electrostatic discharge HBM CDM MM clamp protection latch-up I/O pin failure debug hub

📙 Engineering Mathematics 2

3D Fourier Cos/Sin3D Fourier Cos/Sin3D Fourier Cos/Sin — 📙 Engineering Mathematics — Fourier series transform cosine sine harmonics spectrum DFT FFT 3D visualization basis functions Finger MultiplicationFinger MultiplicationFinger Multiplication — 📙 Engineering Mathematics — finger multiplication mental math arithmetic times table trick nines

📕 Electromagnetics & RF 4

Inductance CalculatorInductance CalculatorInductance Calculator — 📕 Electromagnetics & RF — inductance calculator loop wire bond trace solenoid nanohenry nH geometry mutual self Transient L-C-SWTransient L-C-SWTransient L-C-SW — 📕 Electromagnetics & RF — transient LC switch RLC ringing step response damping energy transfer time domain S11 when Shorted to GNDS11 when Shorted to GNDS11 when Shorted to GND — 📕 Electromagnetics & RF — S11 S-parameters reflection coefficient short to ground Smith chart return loss VSWR impedance match Smith Sphere · private repoSmith Sphere · private repoSmith Sphere · private repo — 📕 Electromagnetics & RF — Smith chart sphere Riemann stereographic projection impedance point at infinity three.js private GitHub repo

📒 Power Electronics 2

Hysteretic Buck Converter · private repoHysteretic Buck Converter · private repoHysteretic Buck Converter · private repo — 📒 Power Electronics — hysteretic buck converter bang-bang relay comparator DC-DC switching frequency fsw ripple ESR ceramic cap output impedance inductor duty cycle synchronous NMOS dead time startup private GitHub repo LDO LDR ChecklistLDO LDR ChecklistLDO LDR Checklist — 📒 Power Electronics — low dropout regulator design review stability phase margin loop gain dropout current limit foldback load transient line transient PSRR startup inrush load regulation VREF trim offset Monte Carlo Cpk quiescent current reverse current thermal shutdown noise EMIR aging ADE XL Assembler maestro SKILL script

📦 Advanced Packaging 1

Advanced Packaging ExplorerAdvanced Packaging ExplorerAdvanced Packaging Explorer — 📦 Advanced Packaging — packaging MCM 2.5D interposer CoWoS EMIB LGA socket chiplet die-to-die cross-section pitch cost

🛠 Lab Tools 5

SVG Editor LiteSVG Editor LiteSVG Editor Lite — 🛠 Lab Tools — SVG editor vector drawing schematic figure markup lightweight browser Brighten EDA Dark ThemeBrighten EDA Dark ThemeBrighten EDA Dark Theme — 🛠 Lab Tools — brighten EDA dark theme screenshot contrast invert Cadence Virtuoso waveform image readable Repo SummaryRepo SummaryRepo Summary — 🛠 Lab Tools — repository summary GitHub repo index catalog overview tool 3D Print Tools — Easy Support & 3D Browser3D Print Tools — Easy Support & 3D Browser3D Print Tools — Easy Support & 3D Browser — 🛠 Lab Tools — 3D print tools STL support generator mesh browser overhang slicer printing 3D Markup + Overlay Viewer3D Markup + Overlay Viewer3D Markup + Overlay Viewer — 🛠 Lab Tools — 3D markup overlay viewer annotate model review compare STL mesh

🧬 Health & Longevity 1

40 Biohacks, Ranked40 Biohacks, Ranked40 Biohacks, Ranked — 🧬 Health & Longevity — biohacking longevity health sleep exercise fasting supplements ranked evidence lifespan

🔐 Cryptography & Security 1

RSA by HandRSA by HandRSA by Hand — 🔐 Cryptography & Security — RSA public key cryptography encryption modular arithmetic primes totient by hand worked example

🎮 Recess — Games & Fun 8

Catch BigfootCatch BigfootCatch Bigfoot — 🎮 Recess — Games & Fun — game Catch Bigfoot arcade fun play RoadblocksRoadblocksRoadblocks — 🎮 Recess — Games & Fun — game Roadblocks puzzle driving obstacle fun play Lake FulmoreLake FulmoreLake Fulmore — 🎮 Recess — Games & Fun — game Lake Fulmore adventure exploration fun play Inks Lake CampingInks Lake CampingInks Lake Camping — 🎮 Recess — Games & Fun — trip page camping Inks Lake State Park Burnet Texas campsite map route Austin Halloween Campsite MoviesCampsite MoviesCampsite Movies — 🎮 Recess — Games & Fun — campsite movies camping film list outdoor screen night Piano TheoryPiano TheoryPiano Theory — 🎮 Recess — Games & Fun — piano music theory chords scales intervals keyboard circle of fifths Tile Pixel PainterTile Pixel PainterTile Pixel Painter — 🎮 Recess — Games & Fun — light grid puzzle 5x5 magnetic LED tiles pixel art paint colors presets pattern LEGO SPIKE PrimeLEGO SPIKE PrimeLEGO SPIKE Prime — 🎮 Recess — Games & Fun — LEGO SPIKE Prime robotics projects kids motors sensors build

✏️ Design Notes

Hand-drawn schematic: Differential Amplifier with CMFB — NMOS diff pair with PMOS current-mirror common-mode feedback Differential Amplifier with CMFB Hand-drawn schematic: 3-bit PRBS LFSR, three D flip-flops with XOR feedback — x³ + x + 1 = 0, i.e. x[n+3] = x[n+1] ⊕ x[n] PRBS — 3-bit LFSR, x³ + x + 1

📑 Index

📘 Analog Circuit Design EE 240
ChapterProjectStatus
Ch. 1MOS Device Models — see Device Physics 2.3 (gm/ID)PLANNED
Ch. 1GBW · Power · Area — Trade-off Triangle — a simple single-gm-stage OTA where GBW = gm/(2πCL) is derived from the bias current ID, inversion level gm/ID and load CL. Drag the operating dot along the Power–Area Pareto front, set Max-Power / Max-Area / Min-GBW spec limits (plots shade the violation regions red), and orbit a 3-D (GBW·Power·Area) view with translucent red spec planes. Live LaTeX equations substitute your current values; SKY130-class modelLIVE GITHUB PUBLIC
Ch. 2Voltage Buffer (SKY130) — unity-gain buffer design on open PDK
📐 Reference schematic — two-stage op amp with NMOS source-follower output (Allen & Holberg)
VDD M3M4M6 M1M2 M5M7M9 M8 Cc CL −vin+ vout VNBias I5 I7 I9
Two-stage op amp with NMOS source-follower output buffer (M8, biased by sink M9) — redrawn after P.E. Allen & D.R. Holberg, CMOS Analog Circuit Design, Lecture 26 "Buffered Op Amps", p. 26-5 (3rd ed., pp. 354–370). The SKY130 buffer uses the same 5T OTA first stage (M1–M5; cf. Yoon & Roh, Electronics 12(18):3833, 2023, Fig. 2) and the same M8/M9 follower output — but drives the follower directly from the OTA output, omitting the M6/M7 common-source stage, and adds Rdeg below the follower source.
TIA Explorer — transimpedance amplifier notebook		 GITHUB PUBLIC
I/OIBIS Model Builder — generate a board-level IBIS (.ibs) model in-browser from device W/L + process (SKY130), measured rise/fall times, raw I‑V data, or a pasted SPICE netlist (auto-detects the PAD I/O net)LIVE GITHUB PUBLIC
BiasCurrent Mirror — Sooch vs. 2-stack Cascode (SKY130) — NMOS bias current mirror on the open PDK: wide-swing Sooch vs standard cascode
Wide-Swing Cascode Current Mirror — LVT-PMOS bias (SKY130) — annotated schematic + 1-click Cadence SKILL generator + report (private)
📐 Wide-swing (Sooch) vs 2-stack cascode — the headroom trade
How each NMOS mirror spends the 1.8 V rail at the output node (I_ref = 10 µA, SKY130)2-stackbias 0.72Vusable swing 1.08 VR_out = 5.5 MΩSoochbias 0.34Vusable swing 1.46 VR_out = 26 MΩ0.000.340.720.901.80output-node voltage [V]
Both mirrors are two NMOS tall (a cascode), so both get the ~gmro2 output resistance. The 2-stack cascode self-biases its cascode gate to 2·Vgs, wasting ≈Vt on the bottom device and starving the output cascode (Vds = 0.15 V → Rout only 5.5 MΩ). The Sooch wide-swing mirror adds one ¼-size bias device that drops the cascode gate to Vt+2Vov, seating the bottom pair at Vdsat — recovering ~0.4 V of output swing and giving ~5× the Rout (26 MΩ) at mid-rail. Full ngspice write-up, annotated schematics and reproducible testbenches in the repo.
GITHUB PUBLIC PRIVATE
BiasCascode Bias Stack — Maximizing Vo Swing via Ri — ngspice study of a 2-NMOS cascode bias string: Ri sets Vbias=Vgs+IB·Ri and positions the internal cascode node Vo (branch current fixed at IB=10 µA). Includes a 2-D Ri-vs-Vo sweep with the both-in-saturation window shaded and the dVo/dRi=IB slope labeled at 30 kΩ; Ri≈30 kΩ centers Vo for max symmetric swing (±0.18 V). Also covers hand-sketch annotated operating points, a Verilog-A resistor model (OpenVAF→OSDI), resistor-programmed AND/OR/NAND/NOR logic, and a differential version (~13.6 V/V).GITHUB PUBLIC
Ch. 3Bode Plot Sandbox — GUI frequency-response explorerLIVE
Ch. 3Feedback Divider — Frequency-Response Analyzer — interactive Bode analysis of a 3-resistor DC-DC feedback divider with feed-forward cap Cz and filter cap Cp: exact transfer function solved live, magnitude & phase plots, pole/zero table, resistance-split pie, and a one-click shareable preload link. The HF pole sits at R1‖R3 (matches TI SLVA289B feed-forward pole), not the sketch's R1+R3.LIVE GITHUB PUBLIC
Ch. 3Miller Two-Stage Amp (1× SF + RC Pole-Splitting) — Frequency Response — error-amp → 1× source-follower buffer → g2 pass device with Miller cap Cm; the buffer steers Cm to cancel the RHP zero (indirect / Ahuja). Live magnitude/phase, gain-budget pie, ranked pole/zero table, and a gm/ID bias table; defaults recover Allen Ex 23-1 (70 dB, GBW 5 MHz, PM 60°).LIVE GITHUB PUBLIC
Ch. 4OTA Inverting Amp — Vo/Vi Explorer — interactive single-file explorer for an OTA inverting stage: plots |Vo/Vi| vs 1/Rsw, 1/Ri or gm, and shows the Miller-compensation feedback zero migrate LHP → ∞ → RHP (transmission null) as g·Rf crosses 1LIVE GITHUB PUBLIC
Ch. 4🔒 Photodiode TIA — Transimpedance & Noise-Gain Explorer (private — offline)
file:///Users/boren_wang/Claude/AnalogLeetcode/Photodiode%20TIA%20Explorer.htmlopen on this Mac — a photodiode (current source + Cp) into an inverting amp with Rf ∥ Cf, built from the hand sketch. Two transfer functions side by side: the signal sees Vout/Iin = Rf ∥ 1/sCf (pole at 1/2πRfCf), while the amp's own error sees the noise gain 1/β = 1 + sCpZf — unity below fz = 1/2πRf(Cf+Cp), a plateau of 1 + Cp/Cf above fp. Figure 2 transimpedance, ideal vs finite A(s); Figure 3 1/β against |A(s)| with crossover and phase margin; Figure 4 Zin = Zf/(1+A) ≈ Rf/A going inductive into Cp. Solve Cf for a target PM, a Cf = 0 ringing preset, and live fc / PM / peaking / −3 dB readouts.		GITHUB PRIVATE
Ch. 4Inverter Self-Bias Animation — short a CMOS inverter's output back to its own input and watch the operating point slide along the VI-vs-VO transfer curve until VI = VO = VM, the switching threshold. Schematic and VTC animate together (scrub, step, 0.5×/1×/2×, ping-pong); the gain notes A and slope = −A fade in while the loop settles, then input leakage ILeak droops the node linearly and walks it back to the start frameLIVE GITHUB PUBLIC
Ch. 4Feedback & Stability — Delayed Hysteretic Shunt-Clamp Protection Loop (SKY130) — an LDO overvoltage clamp as a relay-feedback loop: hysteresis + loop delay → a bounded limit cycle. Time-domain SKY130/ngspice study showing overshoot = slew·τloop and a max-safe-delay damage bound. Private repo.GITHUB PRIVATE
Ch. 4PadCs Error-Amp Current Loop — Stability Analysis — multi-stage Miller-compensated transconductance loop (Iin→1→2→3→4→Iin): pole/zero map sorted from 0 Hz, phase-budget pie, magnitude/phase Bode. The nulling resistor Rz parks a LHP zero at ≈4.2 MHz for phase lead → PM ≈ 64° at fc = 13.8 MHz (Allen Ex 23-1 device values). Private repo.GITHUB PRIVATE
Ch. 5RC Noise Bandwidth: where 4kTR becomes kT/C · why the 4, the R and the π cancel exactly, and why a single pole's noise bandwidth is π/2 × f3dB = 1/(4RC), shown four ways: linear equal-area brick wall, θ = arctan(f/fc) flattening, quarter circle vs triangle, and a rolling-arc animation (arc length = wall height). Plus spot vs integrated noise, 4kT(R₁∥R₂) as the Thevenin R (not "cancellation"), and ENBW by filter order.LIVE
Ch. 6Biquad Sandbox — play with biquad coefficients to create filtersLIVE
Ch. 7Crystal Oscillator — oscillator visualizerLIVE
Ch. 7Ring Oscillator — Phase-Shift Model — why an even ring stalls at −356° while an odd ring crosses −180° and oscillates; a parallel helper 3rd inverter averages the phase past 180° to set foscLIVE
Ch. 7🔒 Delay-Locked Loop — PD, Charge Pump & VCDL Explorer (private — offline)
file:///Users/boren_wang/Claude/AnalogLeetcode/DLL%20Explorer.htmlopen on this Mac — CLK into a voltage-controlled delay line, a phase detector comparing CLK with its delayed copy, and a charge pump on C setting the delay, built from the hand sketch and fact-checked against it. The loop is first order (a delay line has no 1/s, unlike a VCO): τ[n+1] = τ[n] + g(T − τ[n]) with g = IcpKDL/C, so C alone is the loop filter. An XOR driving the charge pump balances at 50 % duty and locks at 3T/4 (or T/4), not T; a PFD locks at T but needs a start-up skip (else stuck at τmin) and τmax < 2T (else harmonic lock). Figure 2 event-driven timing of CLK, VCDL out, UP/DN or XOR and Vc; Figure 3 delay per cycle against (1−g)n; Figure 4 phase-detector characteristic with stable and unstable lock points. Presets for the corrected loop, the sketch as drawn, stuck, harmonic lock and g = 1.5 ringing.		GITHUB PRIVATE
Maker🧩 MagTile Circuits — 1-Second LED Blinker — snap-together magnetic tiles where the magnet is the wire; builds a single-74LVC1G14 Schmitt-trigger RC oscillator (R1=120 kΩ, C1=10 µF) that blinks a red LED at ~1 Hz on a 3 V CR2032, with a tile floorplan that mirrors the schematicLIVE GITHUB PUBLIC
Ch. 8 ΔΣ Modulation — Simple Example (MATLAB)
grumPy WorM — PWM/ΔΣ teaching toy as a flappy game · pygbag version		 LIVE
Ch. 9Analog Leetcode — problem sets & drillsGITHUB PUBLIC
📗 Device Physics EE 130
ChapterProjectStatus
Ch. 1Semiconductor FundamentalsPLANNED
Ch. 2PN Junctions & DiodesPLANNED
Ch. 3gm/ID Device Characterization — MOSFET operation notebookGITHUB PRIVATE
Ch. 3gm/Id First-Order Estimator — where a MOSFET leaves weak inversion: the gm=κ·Id line meets the √-law curve. Live gm-vs-Id plot (generalizes a 180nm bench sketch, extracts µnCox≈180µA/V²) + an editable constants-vs-process-node table & chart (µnCox, κ, corner current density)LIVE GITHUB PUBLIC
Ch. 4Why lowering the bias current can't reclaim headroom — the Vdsat floor — from the Voltage Buffer (SKY130) write-upGITHUB PUBLIC
Ch. 5Short-Channel Effects & ScalingPLANNED
Ch. 6ESD — Protection & Debug Hub — 4 pages: debug master reference · damage first principles · current vs voltage · Rpo ballasting case studyLIVE
📙 Engineering Mathematics MATH 220
ChapterProjectStatus
Ch. 1 Fourier Basic Tones — Fourier series with audio tones
3D Fourier Cos/Sin — intuitive visual spectrum & time		 LIVE
Mental MathFinger Multiplication — the 6×6…10×10 trick — animated SVG hands: fold the orange fingers and add them for the tens, multiply the raised blue fingers for the ones (7×7 → 4 orange + 3×3 blue = 49)LIVE GITHUB PUBLIC
Ch. 2Discrete Fourier Transform (DFT / FFT)PLANNED
Ch. 3DSP Fundamentals — sampling, z-transform, digital filtersPLANNED
Ch. 4Laplace & s-Domain AnalysisPLANNED
📕 Electromagnetics & RF EE 217
ChapterProjectStatus
Ch. 1Inductance Calculator (Visual)LIVE
Ch. 2Transient Switch L-C — switching transients in RLCLIVE
Ch. 3What is S11 when shorted to GND?LIVE
Ch. 4🔒 🌐 Smith Sphere — the chart on a sphere (private — offline) — the Smith chart drawn where it actually lives: the impedance plane projected stereographically onto a sphere from the north pole, so the flat chart is the view straight down that pole and the point at infinity is a place on the surface instead of the rim of the paper. Colour-coded constant-R circles (1, 10, 25, 50, 100, 250 Ω at Z0 = 50 Ω) and ±jX arcs, with an animated morph that flattens the rings into the ordinary 2D chart and reforms them. Click a point for its R ± jX labels, double-click to dim everything but one trace, Spotlight adds a cursor halo, and a Quiz mode puts three lettered squares on the sphere and asks which is R + jX. Single self-contained HTML page on three.js — no build stepGITHUB PRIVATE
Ch. 5Matching NetworksPLANNED
📒 Power Electronics EE 153
ChapterProjectStatus
Ch. 1Flywheel ConverterGITHUB PUBLIC
Ch. 2 Buck Converter — Interactive Explorer — CCM/DCM & voltage/peak-current-mode notebook (local Jupyter) · view on GitHub GITHUB PUBLIC
Ch. 2🔒 Hysteretic Buck Converter — Interactive Simulator (private — offline)
file:///Users/boren_wang/repos/hysteretic-buck-converter/index.htmlopen on this Mac — bang-bang (relay) control instead of a compensated error amplifier: a comparator with hysteresis VIH/VIL drives the switch, so there is no loop to compensate and no fixed clock. One self-contained HTML file, no dependencies, no network. It integrates L·dIL/dt = Vsw − Vout and C·dVC/dt = IL − Vout/RL with Vout = VC + Resr·IC, and flips the switch a comparator+driver delay td after Vout crosses a threshold — so fsw is measured off the simulated gate edges and checked against the closed form rather than assumed. Figure 1 live schematic + IL/Vout waveform (moving a slider boxes that parameter in red in both; ghost traces keep the last three states); Figure 2 VOUT/IL(f) output impedance, live, with fp=1/(2πRLC) and fz=1/(2πResrC) marked and the fsw > fz ⇒ Z ≈ Resr, ∠0° condition flagged; Figure 3 frequency ladder & ripple budget, ranking which term actually sets fsw. The Ceramic-cap button jumps to the low-ESR case where the ripple stops tracking IL and the loop misbehaves. Synchronous-NMOS vs diode low side, startup from Vout=0, shareable-link state encoding, a ▶ interview demo that plays fundamentals Q1–Q5 with timed slider moves and word-synced captions, a vertical (Shorts) reflow, and a command line (demo 3, esr=12, l += 1, sweep esr 40 1 20, play l).		GITHUB PRIVATE
Ch. 2LDO LDR Checklist — 15 Simulation Checks + Load-Regulation SKILL Script — low-level design review for an LDO, simulation side. Separates the given specs (VIN, ILOAD, temperature, lifetime, COUT/ESR window) from the design outcomes the review signs off, then walks all 15 checks in tier order: #1 stability (loop-gain magnitude and phase across PVT × ILOAD min/max × ESR min/max, DC gain / PM / GM / UGF), dropout, foldback current limit, load and line transient (stimulus shown above the response), PSRR with a frequency mask, startup and inrush, load regulation, 6-bit VREF trim, offset Monte Carlo (histogram with ±3σ, LSL/USL and Cpk), IQ and current efficiency, reverse current, thermal shutdown, noise density plus integrated noise, and EM/IR with 5-year aging. Each check has its testbench with stimulus and measured nets marked, the PVT family with the red spec line, a worst-case table with margin and Pass / Marginal / Fail, and copy-ready ADE XL expressions using $DUT, $DUT_POWER, $DUT_GND, $DUT_OUTPUT. Ships ldo_loadreg_setup.il, a CIW load() script that adds the load-regulation test (DC sweep, six outputs, two specs) to an existing ADE XL / Assembler setup, plus a reference list of public app notes. Chart data is illustrative.LIVE GITHUB PUBLIC
Ch. 3Magnetics DesignPLANNED
Ch. 4Board-Level RLC Spec for IC Pins — Multiphase Buck — parasitic RLC budget & victim/aggressor coupling spec for a multiphase buck controller. Interactive spec explorer: aggressor/victim pin-group dropdowns (power, PWM, clock, data, V/I/temp/ref sense) and a ranked list of coupling mechanisms (mutual-L, ground-return, capacitive, PDN, reflection…) that derives the board mutual-inductance / Cac / ground-return limits from each victim's error budget (M ≤ 8.3 pH per aggressor). Bench-sketch coupling schematic + worked Vemf=M·dI/dt. Private repo.GITHUB PRIVATE
Ch. 4Inductive Crosstalk (Aggressor → Victim) — coupled 4-state RLC crosstalk explorer: a primary series-RLC loop (aggressor I1) mutually coupled by M to a secondary L2–R2–C2 victim loop (measured across C2). Shows the transient of I1, the induced EMF M·dI1/dt and the filtered victim, and solves the separation d for a target victim peak (Case A far / 1 mV, Case B near / 100 mV, live Case C runs the actual RK4 ODE). Ships a one-click SciPy reproduction of the Case A table row (matches to <0.5%).LIVE GITHUB PUBLIC
Ch. 4Capacitive Crosstalk (Aggressor → Victim) — coupling-cap crosstalk explorer: aggressor Vagg couples through R1–C1 into a victim R2∥C2 node (a band-pass / high-pass). Interactive log-time transient shows the R1-limited response vs the R1=0 ideal-divider dashed reference, with τ1=R1C1C2/(C1+C2) & τ2=R2(C1+C2) marked. Closed-form victim peak VA·C1/(C1+C2)·(τ1/τ2)^(τ1/(τ2−τ1)), verified vs a 2-state RK4 sim.LIVE GITHUB PUBLIC
Ch. 4Aggressor / Victim Info Builder — type & save aggressor (driver) + victim (receiver) pad info for SI crosstalk, with one-click macros for popular ICs (multiphase buck/boost, audio codec, DDR5 memory, BLDC motor gate driver) and optional Rin/Rout/Cin/dV min–max (blank ⇒ single value). Exports the sectioned # AGGRESSORS/# VICTIMS CSV that the Inductive-Crosstalk Spec Checker imports (paste or browse .csv).LIVE GITHUB PUBLIC
Ch. 4🟦 Parasitic Extraction (.cir / .scs) Table Viewer — drop or paste a SPICE (.cir) or Spectre (.scs) parasitic-extraction netlist and get sortable/filterable tables + copy-paste Confluence/Markdown markup for mutual L (K couplings → M=k·√(La·Lb)), self L, mutual C, self C-to-GND, resistance, and transconductance (VCCS/gm) — each with a pie summary, value-range filter and heat-bar ranking. Handles Spectre master-keyword syntax with bare or parenthesized nodes, so it also opens state-space / IdEM rational macromodels (built from vccs/pvccs sources), with a Debug panel showing the element-type histogram. Net filters take glob wildcards (*PWM*) and also match the element name; the Mutual-Inductance table opens pre-filtered Net1=*PWM* / Net2=*CS* to surface PWM-aggressor → current-sense-victim couplings.GITHUB PRIVATE
Ch. 4Crosstalk Buffer Approximation & Spectrum — aggressor→victim AC cap-coupling, worked as an imaginary unity-gain buffer that decouples the network into two independent transfer functions. Interactive spectrum, a 1 MHz square-wave aggressor drive & its harmonic spectrum, transient waveforms, and Python reference simulations. Private repo.GITHUB PRIVATE
🎛 Control Systems EE 128
ChapterProjectStatus
Ch. 1Feedback & Block DiagramsPLANNED
Ch. 2Stability & Root LocusPLANNED
Ch. 3Relay Feedback & Limit Cycles — Delayed Hysteretic Clamp Loop (SKY130) — a hysteretic (relay) shunt-clamp with transport delay: the classic relay-plus-delay limit-cycle oscillator, worked in the time domain on real SKY130 devices. Derives the overshoot law Vpeak=Von+slew·τ and a maximum-loop-delay stability bound, all verified in ngspice. Private repo.GITHUB PRIVATE
Ch. 4🔒 Ramp-Sync Type-II Loop: syncing a ramp oscillator to clk_ref · sample Vc − Vtrip at each clk_ref edge (it equals the next cycle's equivalent Vinit), close a PI loop on it. z-domain model P(z) = z−1/(1 − z−1), D(z) = Kp + Ki/(1 − z−1); delay-cell block diagram; switched-cap charge-amp build with Kp = Cp/Cf, Ki = CI/Cf; cycle-by-cycle transient, FFT-extracted spectrum vs analytic |S|; phase noise L(f) type-II vs first-order. Private repo.GITHUB PRIVATE
📦 Advanced Packaging EE 245
ChapterProjectStatus
Ch. 1Advanced Packaging Explorer — how a package re-connects two chiplets: pick an example (MCM on organic substrate · 2.5D silicon interposer / CoWoS · EMIB embedded bridge · LGA socket) and see a labeled cross-section + the die-to-die path, interconnect pitch, cost and a real-world part; side-by-side comparison tableLIVE GITHUB PUBLIC
Ch. 23D stacking — TSV & hybrid bonding (Foveros)PLANNED
📦 Tool Install Convention HOUSE RULE

Every single-file tool repo in this account installs the same way: save one ZIP, paste one command, paste one more to run it. Two clicks and two pastes, nothing to learn per tool, and it works on a locked-down EDA server where pip install is not available. The steps are always these, with only the repo name and the script name changing:

StepWhat the user does
0 On the repo page click Code ▾ → Download ZIP (or the <repo>-main.zip link in the README). It lands in ~/Downloads. Nothing is renamed or unpacked by hand.
1 Paste one command that unpacks the script into ~/bin and prints the version it just installed — so the paste itself proves it worked: 
mkdir -p ~/bin && unzip -jo "`ls -t ~/Downloads/<repo>-main*.zip | head -1`" "*/<script>.py" -d ~/bin && chmod +x ~/bin/<script>.py && python3 ~/bin/<script>.py -V
2 Paste the run command, with the user's own path substituted: 
python3 ~/bin/<script>.py <their file> --open

Why it is written this way. ls -t … | head -1 picks the newest download, so a browser that saved …main (1).zip still works and re-pasting step 1 is how you update. unzip -jo flattens and overwrites, so there is no nested folder and no stale copy. The backtick-in-double-quotes form runs unchanged in bash, zsh and tcsh/csh, which matters because the EDA servers here default to tcsh. Ending on -V turns the install into its own test. Nothing outside ~/bin is touched, so rm ~/bin/<script>.py uninstalls it.

Rule for Claude — do this without being asked. When you create or update a tool repo in this account, its README must open with this exact three-step block (adapted only in repo and script name), the script must accept -V/--version, and you must verify the paste end-to-end against the live archive URL before saying it works. Do not invent a different install (no git clone, no pip install, no setup.py, no installer script as the primary path). Add the curl one-liner and the scp-to-server note as sub-points, never as the main route.

Already following itScript installed to ~/bin
GDS Dashboardgds_dashboard.py
Chip Top Layout Reviewchip_review.py, hier_browser.py
Spectre Spec Re-runspec_rerun/spec_rerun.py
ADE XL Spec Re-runadexl_rerun/adexl_rerun.py
Device Operating Pointdevice-op-point/oppoint.py
xrun SHM Run Finderxrun_shm_trn_finder.py
🛠 Lab Tools SHOP 101
ToolDescriptionStatus
SVG Editor LiteLightweight SVG editorLIVE
Brighten EDA Dark ThemeMake EDA screenshots readableLIVE
Calibre DRC / LVS GUIBrowser GUI to launch Calibre DRC/LVS in your shell env — prefill from logs, auto module-load, newest-deck discovery, live ETA, result compareGITHUB PRIVATE
Maestro → ADE XL Converter GUIBrowser GUI that converts a Cadence ADE Assembler/Explorer (maestro) setup into a legacy ADE XL (adexl) cellview from the full path of a maestro view — pure file transform in your shell env (no Virtuoso needed), live log, and a per-file fidelity report diffing against any existing adexl view for the cellGITHUB PRIVATE
SimVision .trn Snapshot → Static-Source StubFreeze a digital sub-block so the analog around it can be simulated without co-simulating it. Pick a block scope and a time out of a SimVision .trn; get a SKILL script that builds <lib>/<cell>/schematic_<xxx> beside the block’s existing schematic. The new view keeps the same interface — every pin recreated with its original name, direction and location, so it drops straight in under the existing symbol — but the insides are gone: inputs and supplies are left floating for the testbench to drive, and every output pin is tied to an analogLib/vdc at the design variable VDD (logic 1) or 0 (logic 0), matching that signal at the snapshot instant. Buses expand per bit (state<3:0> → four sources); x/z outputs are reported and left floating rather than guessed, with a per-pin override. HTML GUI (scope tree, snap-to-nearest-transition, value table) plus a headless CLI, and the generated SKILL self-checks its own connectivity after schCheck. Verified on IC618 against a 9-pin cell with scalar, 4-bit and 2-bit output buses: 9 sources, 9 connected, 0 unconnected. Private repo.GITHUB PRIVATE
🌊 xrun SHM Run Finder → SimVisionFinds the waveform database you actually meant to open. Walks the places Xcelium runs land — /sim/$USER and a dozen site variants, auto-detected or remembered — for every *.shm/*.trn, and writes one self-contained HTML page: a sortable, filterable table of runs carrying the facts you would otherwise open a log to learn (-top, whether the run reached $finish or died on *E,/*F, lines, the $finish time, the size of the whole .shm directory, its age), and a per-row button that copies the exact cd <run dir> && simvision waves.shm/waves.trn -input probes.svcf &. It keeps the three things nobody wants to keep notes on: the sim directories (--save-dirs), which .svcf goes with which design top — keyed on the top, not the directory, plus a library that follows you across projects — and every command it has handed out, newest first. --serve makes those durable from the browser and --allow-launch lets a row start SimVision itself, on the sim host, from the run's own directory; --latest prints the newest run's command for a shell alias. Python 3 standard library only, one file to copy to the server, 46 self-tests over the scan, the log parsing, the shell quoting and the page. Private repo.GITHUB PRIVATE
Run .csh + ihdl lock-check GUIRun a .csh in your shell env with a Cliosoft-SOS lock-check guard for Cadence ihdl (verify schematic/symbol aren't checked out first) — live log + ETAGITHUB PRIVATE
ADE XL Pass/Fail DashboardBrowser dashboard for Cadence ADE XL / Assembler pass-fail tests — scans libraries for specs, reads pass/fail straight from the results SQLite DB (color-coded, last-checked timestamps), pick tests and launch runs from your shell env with live % / ETA and a timestamped run logGITHUB PRIVATE
🎨 ADE Highlight ↔ ViVA Trace Colour Match (private — SKILL; one command)One command so a net’s schematic highlight colour equals its ViVA waveform trace colour, and both draw thick solid — so with five nets plotted from an ADE XL output you can still tell which curve is which net you clicked. ADE and ViVA colour the same net from two unrelated display-packet sets: traces from y0…y15 via awviPenIndexToColor(n), highlights from hilite…hilite9 via envGetVal("ab" "highlightColors"). Stock IC6.1.8 has 9 of the 10 slots disagreeing (trace 1 red, its net magenta), and hilite1 and hilite8 are both magenta by default, so two different nets highlight identically. adeHiliteMatch() reads the colour of each ViVA pen, writes a small DRF of its own that redefines hilite<i> with that colour and a thick line style, loads it with drLoadDrf, and sets ViVA’s own trace render to thick + solid. Everything it writes goes to ~/.ade_hilite_match.drf — it never edits the PDK DRF, your display.drf, or any file you did not name. ./adehilite installs a managed block in ~/.cdsinit (backing it up first) so every Virtuoso session comes up matched; for the Virtuoso already running it prints the single load("…/ade_hilite_match.il") adeHilite() line to paste in the CIW, then reload the schematic window to recolour nets already highlighted. Packet existence is probed against IC6.1.8’s fall-back packet, so “drGetPacket returned something” is not mistaken for “the DRF defines it”. Only 10 highlight slots exist against 16 ViVA pens, so traces 11–16 have no highlight colour to match — an ADE limit, not a limit of this tool. Private repo.GITHUB PRIVATE
Cadence Config-View ManagerView, edit, bulk-rebind and compare Hierarchy-Editor config views (expand.cfg) — scans libraries for config views, assign cell/instance views by drop-down (real on-disk views resolved via cds.lib), filter + sort + multi-select bulk rebind, save back (with .bak), and diff config_set1 vs config_set2GITHUB PRIVATE
gm/ID PDK CharacterizationPDK-agnostic MOSFET gm/ID characterization CLI (Cadence Spectre) — sweeps every device flavor to build a gm/ID lookup table, plus an offline interactive HTML viewer for the LUT. Private repo.GITHUB PRIVATE
Eliminating Multipliers with Log / LNS Arithmetic (SKY130)Two RTL builds of the same multiply-compare kernel (A·B + C·D) > Vth (10-bit inputs) — one with real multipliers, one multiplier-free via a K=2 logarithmic (LNS) datapath: leading-one detector + 2 mantissa bits, logs added, combined by an LNS add s = max(x,y) + F(|x−y|) where F(d) = log₂(1+2−d) collapses to a 79-entry 1-D ROM. Synthesized on the open sky130 HD library: −57.5% standard-cell area (8846 → 3761 µm²), −57.8% estimated power, both multipliers eliminated, at a 2.84% disagreement with exact math — the K=2 approximation cost, measured over a 4 M-combo Monte-Carlo rather than assumed. One Python golden model emits the ROM the Verilog consumes, so model and hardware cannot drift; RTL verified bit-exact over 58,139 vectors. The Vth′ correction block is also carried to real layout in Cadence (tcb018, Innovus, 0 DRC violations). Private repo.GITHUB PRIVATE
Spectre Spec Re-runCLI that replays a Cadence Spectre run from its own spectre.out log: reads the deck's assert spec checks, re-runs the identical command (same -format, ++aps, -64 …) into a fresh raw dir so the old results survive, then writes one self-contained HTML report putting the checks side by side — NEWLY violated / still violated / clean. Also dates the run against the schematic's netlist timestamp, so results that came from a stale deck are flagged rather than trusted. Prints a file:// link to the report; exit status 0 / 1 / 2 so a nightly script can just check it. Python 3 stdlib only — no numpy, no Cadence tooling to install. Private repo.GITHUB PRIVATE
⚡ Transient Convergence BKMsWhat to do when a transient will not converge, as copy-paste rather than folklore. Seven short docs — read the log first; method=gear2only + cmin + more Newton iterations before anything else; tighten, do not loosen (errpreset=conservative fixes time step too small more often than liberal, which takes bigger steps into the same discontinuity); and define the starting state instead of hiding a high-Z node behind a tolerance. Four ways to put every high-Z node at 0 V: ic statements generated from the log's own No DC path warnings, skipdc=yes with the supplies ramped from 0 so t=0 is genuinely consistent, a Verilog-A startup clamp that holds past t=0 and releases through a transition() instead of a step, or cmin/bleeders — with the cases where each one lies to you (both sides of a latch at 0 V is the metastable point; a raised gmin is your droop measurement). Pasteable Spectre option menus, ic/nodeset/readic recipes, HSPICE equivalents, a CIW SKILL library (presets for ADE L and ADE Explorer, plus a high-Z net finder that reports nets whose every connection is a MOS gate or a cap), an OCEAN ladder that runs the settings unattended and reports which one got through, and three stdlib-Python tools: a spectre.out doctor (HTML report, DASH_ tile markers, and a generated fix snippet), an input.scs patcher that keeps ADE's own results untouched, and an all-nodes-to-0 V IC generator. No PDK or design data — generic syntax and synthetic samples only.GITHUB PUBLIC
📐 Cadence Schematic → Hierarchical .scs BrowserCLI that netlists a Cadence lib/cell/view to a full-hierarchy Spectre .scs (standalone si driven from a generated si.env, or your own --netlist-cmd, or an existing netlist passed straight through) and writes one self-contained HTML page beside it. A hierarchy browser with +/− on every block shows each level's five biggest blocks — ranked by flattened leaf-device count, not by netlist order — followed by a … N more row, so the interesting blocks stay on screen instead of drowning in decaps and buffers. Bussed instances (XD<0:9>) count as the ten devices they really are; recursive subckts are detected, marked, and stopped rather than hanging the page. Below it a 20-line netlist window with line numbers: clicking a block jumps to its subckt and highlights the whole definition, and a regex search (hinted <0> — bit 0 of every bus) steps matches, filters to matching lines only, and turns red with the actual error on a bad pattern. One-click copy of the whole .scs, or save it through the browser. The path box on top is prefilled from the command line and re-netlists a different cell — printing the command in the static page, live over loopback under --serve (tunnel it like VNC). The tree is expanded lazily from a flat per-subckt model, so deep repetition never blows up. Python 3 stdlib only, no CDN or network calls in the report; 13 unit tests over continuations, bus widths, recursion termination and </script> injection. Private repo.GITHUB PRIVATE
🗺️ GDS Dashboard — compare two GDSII layoutsCLI that puts two GDSII files side by side in one self-contained HTML page: gds_dashboard.py --file1 rev1.gds --file2 rev2.gds. Each file gets a layout outline drawn from its own geometry — boundaries filled, paths stroked at their real width, per-layer colours and visibility toggles, drag/wheel pan and zoom — and lock views together ties both viewers to the same micrometre coordinates, so panning one pans the other, which is the point when the two files are two revisions of the same die. The drawing runs on a shape budget expanded biggest-on-screen-first; whatever the budget cannot reach is drawn as its cell bounding box, so even a 32 MB flat fill file with 500k boundaries in a single structure gives a real outline instead of an empty rectangle. Beside it: a summary table (library, database unit, top cell, structures, hierarchy depth, die width/height/area, layers, element and vertex counts, flattened shape and instance counts) with every differing row highlighted and given a Δ and a percentage; one collapsible hierarchy tree per file where every cell shows its five largest sub-cells and folds the rest into a single … N more sub-cells row, each row carrying its instance multiplier, flattened shape count and bounding box, with cells missing from the other file badged only here and changed cells badged differs; a per-layer table with flattened area in µm²; and a cell-by-cell diff (only in A / only in B / changed / identical). The GDSII stream parser is written against the format spec, so the tool needs nothing but the Python 3 standard library — no gdstk, no gdspy, no pip — which is what makes it usable on a server where installing a layout toolkit is not an option; .gds and gzip .gds.gz both read. Two 3 MB hierarchical chips (415 and 351 cells, 3.1M and 5.4M flattened shapes) compare in ~4 s. 45 self-tests (--self-test) over the 8-byte GDSII real codec, record parsing, AREF COLROW handling, top-cell detection, bounding boxes through rotation and mirroring, transform composition, the flattening budget and its fall-back to cell boxes, gzip input and the generated page. --demo writes two synthetic chip revisions (pad ring, seal ring, SRAM array, logic rows, analog block) and compares them, so it runs with no design data at all.GITHUB PUBLIC
ESD / IO Pin Tracer (private — offline; usable locally)Offline HTML tool: generate copy-ready SKILL for the CIW that traces schematic pad nets through the hierarchy (resistors as shorts) down to transistors and dumps a CSV; the page renders a grouped, per-column filter/sort table (pin rowspan merge) with per-pin summaries — output driver ΣW and estimated input CinGITHUB PRIVATE
TSMC Transistor FlavorsEditable CSV of TSMC node × flavor → approximate (public) gate-cap Cox, used by the ESD/IO Pin Tracer to estimate input capacitance. Values are placeholders to replace with your PDK's numbersGITHUB PRIVATE
Verilog Pin Mismatch Debugger (private — offline; usable locally)Offline HTML tool: generate copy-ready SKILL for the CIW that dumps a schematic view's terminals, paste it back, and diff against a SystemVerilog module — highlights pin name / direction / width mismatches (bus <7:0> ↔ [7:0], inputOutput ↔ inout)GITHUB PRIVATE
🔌 SimVision .trn → Interactive Schematic (repo)Point trn2schematic.py at a Cadence SimVision SHM database (waves.shm/waves.trn) and get one self-contained HTML schematic — no Virtuoso, no server, no netlist. An SHM file carries no connectivity, so the netlist is recovered from the waveforms themselves: signals whose transition traces are bit-exact identical are the same net, fingerprinted per bit, so fa_chain[2].fa.cin resolves to dut.carry[2] and .a to dut.a[2]. Hierarchy comes from the $scope tree (empty generate wrappers fold into the block label) and pin direction from simvisdbutil -reginput. In the browser: opens at the top level, double-click a block to expand it in place while its unselected peers are ignored, shift-click to drop a net or pin, drag blocks to rearrange (wires re-route live), and click any wire/pin to probe its waveform in the pane below — the transition data travels inside the page. Reads a .vcd too, so it works with no Cadence tools at allLIVE GITHUB PUBLIC
MCM / Package Browser (repo)Single-file viewer for a flip-chip BGA-on-substrate package: 2-D layer-by-layer top view (per-layer visibility / solo / net-highlight / hover-for-net, pan & zoom) and a 3-D exploded stack (soldermask → metals / planes → core → metals, with die + C4 bumps + BGA balls + via pillars; orbit / zoom / explode / auto-spin). Ships a sample FCBGA; Load JSON accepts a neutral package-JSON exported from a Cadence .mcm (extracta / IPC-2581 / ODB++)LIVE GITHUB PUBLIC
SVG Editor Lite (repo)Single-file, offline in-browser SVG editor: draw / select / snap / freehand doodle, live element tree, theming, and session auto-save to localStorageLIVE GITHUB PUBLIC
Voice to SVGVoice → vector graphicsGITHUB PUBLIC
🧩 Dashboard Integration FormatThe house format every tool here follows so a new .py and its .html drop into one master dashboard as a live tile: five DASH_ marker lines on stdout carry status, summary and metrics; the task writes its own self-contained sub-page and announces it with DASH_HTML; one JSON object registers the tile. Standard-library Python, runnable standalone, and backward compatible — a script with no markers still scores itself from a verdict: line or its exit code. Written so Claude Code can build the next checker to spec instead of inventing another output shapeLIVE
Repo SummaryAuto-updating list of all published reposLIVE
ls-home-notebookHome notebook (Jupyter)GITHUB PUBLIC
🖨️ 3D Print Tools — Easy Support & 3D Browser (repo)Two client-side tools. Easy Support: detects overhangs by grid-sampled downward raycasting and builds tapered supports with slim contact tips (default 4× smaller contact area) for clean removal — reads .3mf/.stl, exports a valid .3mf (+ .stl), measured reduction shown live. 3D Browser + editor: drag-and-drop viewer for STL / 3MF / OBJ / PLY / glTF with slicer-style mouse (left orbit, middle pan, wheel zoom) and mm dimensions — plus push/pull a flat face (M), detach a weakly-attached part chopped at its narrowest neck (O), and a surface-relative snapping ruler (K)LIVE GITHUB PUBLIC
📏 Circuit Stencil Ruler (3D print)Printable circuit-drafting stencil ruler (190 × 118 × 3 mm): engraved cm + inch scales plus 19 through-cut schematic symbols traced faithfully from the source SVG (inverter/Schmitt, logic gates, latch & flip-flop, MOSFETs, resistor, inductor, capacitor, ground, diode, op-amp, V/I sources, meter, transformer, switch) that you trace with a pen. A Python generator (shapely + trimesh) parses template_ruler.svg, arranges/sizes the real shapes, and auto-adds tiny stencil bridges to every enclosed island (31 islands / 34 ties) so nothing drops out — the STL is one watertight solid. Ships the .stl, draft render and generatorGITHUB PUBLIC
🧩 3D Markup + Overlay Viewer (repo)Single-file, fully offline viewer for a 3D model that you can mark up in 2D and overlay for comparison. Reads .stl / .3mf / .obj (drag-drop or picker), all parsed locally. Overlays load on the same coordinates so a lid and its tile line up — rendered semi-transparent with an X-ray toggle to reveal overlap. Six orthographic views (top/bottom/front/back/left/right) plus a free isometric orbit, live mm scale bar and model dimensions. Draw pen / line / arrow / box markup (color palette + adjustable thickness) locked to the current view, then export the render + markup as a PNG. Three.js + JSZip inlined — no build, no network callsLIVE GITHUB PUBLIC
✂️ 3MF Point Editor (repo)Single-file browser editor for reshaping a printable mesh by dragging its vertices, then exporting back to .3mf. Box-select points (Bambu-style navigation), drag free / locked to X-Y-Z / with a smooth soft-falloff radius, live Δ readout in mm. Import resolves <component> references recursively so assemblies and Bambu/Prusa build wrappers place every part, and vertices are welded on load so dragging a shared corner doesn't tear neighbouring triangles. ▱ Surface select grabs a whole parallel surface within an angle tolerance and moves it along Normal/U/V arrows; ⧉ Extrude duplicates a surface patch and bridges it. ＋ Add solid drops in a box / oval / cylinder tool solid with numeric mm-and-degree size, position and rotation, then Merge ∪ or Cut ∖ it in via BSP CSG. ▽ Simplify is QEM edge-collapse decimation with a Keep % budget (default 15 %) — that's what turns a 70 k-triangle boolean'd plate into something you can actually drag point-by-point — and ✚ Heal welds, drops internal walls, fills holes and fixes winding until a live health badge reads watertight & manifold. Also 2-colour part merge for fit checks, ◧ glass transparency, and touch/pinch support on phones. Three.js + JSZipLIVE GITHUB PUBLIC
🔒 🧱 Giant 1x1 Brick — Cup + Lid Designer (private — offline)Parametric designer for a scaled-up LEGO 1×1 that is itself built out of real LEGO construction — a cup and a matching lid, exported as one plate. One scale factor (4×–12× a real 1x1) drives the stud grid, the giant top stud and the body height together, so the part stays a legal brick at every size; floor height and lid thickness are quantised to LEGO plate/brick steps (3.20 / 9.60 mm) because a floor that is not a whole plate cannot accept studs underneath. The interesting constraint is fit: moulded LEGO runs a 6.51 mm tube against a 4.80 mm stud — 0.002 mm of radial clearance, which is a clutch when injection-moulded and a jam when printed, so every anti-stud here is deliberately opened up and the clearances are shown in their own table rather than buried in the mesh. Live 3D preview with assembled / exploded / half-section views, per-part visibility and opacity; a Z budget panel breaks the height into its layer stack so you can see where the millimetres went. Exports a .3mf carrying cup and lid as two separately coloured objects side by side on the plate (so the slicer can split and colour them), plus cup.stl / lid.stl and a copyable Python parameter block for the build script. Single self-contained HTML file — no build, no network callsGITHUB PRIVATE
🔒 🧩 Odd Brick — half-pitch clip-in editor (private — offline)Parametric editor for a brick that clips into the middle of an already-built grid instead of on top of it. The footprint corners land on stud centres, not stud gaps, and brackets hug the outside of every boundary stud, so the part presses in at half-pitch offset from the host plate — which is what lets you add geometry to a wall you have already built without taking it apart. Set the N×M footprint and click cells to place top studs (each sits over the middle of the four host studs it binds). Fit is exposed as its own group — grip radius R, wall, bracket height, roof thickness, corner draft and a relief slit with its own width, the slit being what lets the bracket flex enough to snap on rather than shear. Separate bracket geometry for 90° corner, 180° edge, 360° inner and top stud. Live 3D view (drag orbit · right-drag pan · wheel zoom) with an underside view, an optional host plate to check interference, and explode-Z. Exports .3mf with a grip-Δ gap-tuning control and a sweep count, so you can print a ladder of fits and keep the one your printer actually holds. Single self-contained HTML file — no build, no network callsGITHUB PRIVATE
🔬 dd — Digital Discovery from the Command Line (repo)Drives a Digilent Digital Discovery from a shell — logic analyzer, pattern generator, static IO, VIO rail and the I²C/SPI/UART engines — as Python + ctypes straight onto Digilent's libdwf, so there is nothing to pip-install and nothing to build. Captures stream to VCD (GTKWave/PulseView), CSV or raw binary without ever holding the run in memory, and each one ends with an activity summary naming the lines that actually toggled — the fix for a capture whose idle first screenful is indistinguishable from a dead probe. Pins are the silkscreen numbers (DIN0–23 input-only, DIO24–39 drivable); the SDK's 0-based indexing of DIO24–39 is derived from the device's own reported channel count rather than hardcoded. The pattern generator searches for a divider that divides the requested period exactly and warns when a frequency is off the 100 MHz/(divider × ticks) grid instead of silently returning a different clock. Because every invocation is its own process, the device is deliberately left running between commands, so dd capture cannot tear down a generator dd pattern just started. Ships two worked examples — rise/fall a GPIO pin, and drive a pin then capture its own edges with no wiring (DIO24–39 are shared between generator and analyzer). Verified on real hardware: 1 MHz on DIO24 lands on exactly 100/100 ticks (50.0% duty) at 200 MSa/s. A fake libdwf written in C lets the whole hardware path run with nothing plugged in — 145 assertions on the values that cross the ABI, which is what caught a genuine 13 ppm frequency bug. Documents the macOS trap where the SDK enumerates nothing (ERC: 3090) unless dwf.framework is copied to /Library/Frameworks — the WaveForms GUI works regardless, so it looks like anything but an install problemLIVE GITHUB PUBLIC
🎧 AirBoost — AirPods volume fix (Windows 10 / 11)Windows tray app for the complaint that AirPods are too quiet even at 100%, built to fix the cause rather than paper over it. Windows maps its own master slider onto the headset's AVRCP absolute-volume scale and the top of that mapping lands well short of what AirPods will actually do, so AirBoost writes DisableAbsoluteVolume=1 and lets Windows send full-scale audio while the buds stay at their own level — on its own that is usually the whole fix, and it is a jump rather than a nudge. Second cause: the moment anything opens the Bluetooth mic the link drops from stereo A2DP to the mono, 8–16 kHz hands-free profile ("it went quiet and sounds like a phone call"), so it can disable the Hands-Free AG Audio endpoint to stop that switch. It elevates only for those registry writes — a JSON job handed to a runas copy of itself — and both are revertible from the same window. A watchdog then pins endpoint master, mute, per-channel and every per-app mixer volume at 100%, since a browser left at 30% looks identical to "Windows is quiet". When that still is not enough, the third step is a real amplifier: WASAPI loopback capture → resample → channel map → up to +24 dB through a feed-forward peak limiter (1.5 ms attack, 180 ms release, −1 dBFS ceiling, soft saturation behind it, so the gain arrives as loudness instead of the squared-off peaks that make cheap boosters sound blown) → WASAPI render on a second endpoint. It refuses same-device routing, which would feed back within a second, and trims the queue to bound drift between two independently-clocked endpoints. Tray icon, global hotkeys, run-at-login, single instance. .NET 8 WinForms + NAudio, self-contained single-file for x64 and ARM64; CI packages an Inno Setup installer on tagGITHUB PUBLIC
🫥 Vanish — one-key show desktop (macOS)Menu bar app for the thing macOS never made one keystroke: clear every window off the screen, and put them all back. ⌥D hides all apps at once (⌘H does one, and getting back means ⌘Tab through every app in turn); the same key restores them with the app you were working in still frontmost. Hold it instead and it is a peek — everything returns the moment you let go. Hiding rather than minimizing is deliberate: instant, no genie animation, windows keep their exact size and position, no permissions needed. The part that is harder than it looks is that one press does not clear the screen — macOS always keeps some app frontmost, so hiding the front app makes the system promote the next one and un-hide it to do so, and two apps can ping-pong forever, each one's hide reviving the other. Vanish takes activation itself first so there is nothing to promote, leaves Finder out of the sweep to absorb the activation and hides it last once nothing else is standing, then re-checks for stragglers up to 8 passes at 150 ms; an app that re-shows itself 3 times (some VPN clients do) is logged and left alone rather than spun on. Measured on a 15-window desktop: one press, 15 windows → 0. It also remembers which apps it hid, so restoring never drags back something you had tucked away yourself. ⌥← / ⌥→ snap the front window to the left or right half of whichever display it is on — halves cut from one rounded split so they meet with no seam, clear of the menu bar and Dock, correct on a second display at a negative origin (AX geometry is top-left-origin, NSScreen is bottom-left). Keep Visible exclusions, rebindable shortcuts, launch at login, and a distributed-notification API so Shortcuts / Raycast / a Stream Deck can drive it. Swift + AppKit, universal binary, builds with the Command Line Tools alone — no Xcode. Private repo.GITHUB PRIVATE
📝 HtmlEditor — paste-a-picture HTML editor (macOS)Native macOS editor for the one thing a plain text editor cannot do with an .html file: paste a screenshot into it. The picture is written next to the document and referenced with a relative <img src>, so the folder stays portable — no base64 bloat, no blob: URL that dies on save. A copied image file keeps its own name (sanitized); a screenshot or a browser “Copy Image” arrives as raw PNG/JPEG and becomes pasted-image.png, never overwriting one already there. Getting there needed an AppKit detail: a plain-text NSTextView advertises no image type as readable, so AppKit greys out Edit ▸ Paste the moment the clipboard holds only a picture — which silently breaks ⌘V too, and looks like the app ignoring you. The view validates that item itself. Left pane is the markup, right pane a live WebKit preview you can type into, and clicking in either scrolls the other to the matching spot. Both are the same mechanism: each opening tag is stamped with its character offset in the source when the preview renders, an attribute that exists only in the rendered copy and never reaches the saved file. That offset is also what makes preview editing safe — an edit patches only the element you touched, located by its offset and spanning it exactly (nesting, void and self-closing tags, comments and < inside script bodies all handled), so every other byte of the file keeps its own indentation and attribute order. The obvious alternative — write the whole rendered document back — is what a first cut did, and it quietly destroyed pages: anything the page's own scripts built at runtime became permanent markup, so a copy button created by a script was written in without the onclick its script had assigned as a JS property, leaving one dead button plus a fresh one on the next load. The tempting fix — disable page JavaScript while editing — was measured and rejected: with content JS off WebKit strips <script> elements and inline onclick attributes out of the DOM entirely, so serializing that back would have deleted every script in the file. Reopens the last document, and installs with one pasted line (curl … | bash) that clones, builds, ad-hoc signs, clears the quarantine flag and drops the app in /Applications. Swift + AppKit + WebKit, no dependencies, builds with the Command Line Tools alone — no XcodeGITHUB PUBLIC
🔒 🔌 Push-Pull PLL — Bond Plan & Register-Write Debug (private — offline)Bring-up pages for a 40-pad COB inductive push-pull back-telemetry chip, written to answer one question at the bench: what is the fewest bond wires that still reproduces the failing test? The answer is 20 of 40 pads — the whole config-register path (6 addr + 8 data + clk + rstb, two grounds, one 1.8 V supply) plus a single observation pad, CfgEnPll, so the write is confirmed on a scope rather than inferred. The 40-pad ring is drawn to scale with the bonded set colored by function group and the other 20 grayed out, each with the condition that would make it necessary (HV supplies for the TX power path, vL2/VLPP for the inductive link, clk_in only once the PLL must actually lock), so nothing is dropped silently. A per-wire table carries the value each line holds during the write — addr = 0x20, data = 0x0F — and the plan flags the two assumptions it cannot verify from the deck (whether pad 25 en gates the config block; whether the register logic is fed from pad 40 or through the on-chip LDO) as things to check before bonding, when they are still cheap. The debug half ranks four hypotheses for why only 6 of 10 register writes land — 3.3 V Nucleo GPIO driving 1.8 V pads (ESD clamps injecting into VDD1P8 on every edge), line ringing, ground bounce on a single GND bond, setup/hold at ~1.31 MHz — each with the evidence behind it, and ends with one discriminating experiment: rerun at half clock with series resistors, because 10/10 then separates signal integrity from logic in a single measurement. Also holds the CMOS V–f–P DOE plan and an interactive 3D energy · voltage · Fmax trajectoryGITHUB PRIVATE
🔒 🧪 Push-Pull PLL — Self-Test Runner & Result Viewer (private — offline)Bench tooling for the same COB chip: a wrapper that runs the five-part pll5tests.zsh self test, saves every transcript, and builds two self-contained pages from it. Each measurement prompt rings the bell, plays a sound and prints in reverse video, because the operator is watching a multimeter and not the screen. A dashboard parses the five newest runs and overlays them on one set of lanes — one colour per run keyed to chip ID, with the slots where they disagree shaded — and a per-run report compares a run against the one before it. Both are built with their logs baked in, because a file:// page can neither list a directory nor fetch a log. Also documents how to abort a run mid-test and return the chip to a known state without leaving CfgForcePull setGITHUB PRIVATE
🧬 Health & Longevity BIO 200
TopicDescriptionStatus
40 Biohacks, RankedHealthspan & productivity interventions ranked by evidence × impact — with a top-10 traps list and cited primary sourcesLIVE
💰 Personal Finance FIN 101
TopicDescriptionStatus
🔒 📊 Budget Timeline — Recurring vs One-time (private — offline)
file:///Users/boren_wang/repos/budget-timeline-dashboard/index.htmlopen on this Mac		Single-file, fully offline budget dashboard built on one idea: four buckets on one axis — recurring/one-time × income/expense. Income stacks upward from $0 (recurring solid, one-time dashed on top); expense hangs downward from the top edge of recurring income, so the dot at the bottom of the expense column tells you whether the paycheck alone covered the month. Import a Monarch CSV for actuals and the next 3 months get forecast. Includes a 2× month-detail zoom beside a filterable transaction table (category / account / regex), a running-balance line, a recurring-vs-one-time 2×2, a spending-mix pie and a category table that flags any month >1σ above that category's own average, and an annual-impact ranking (recurring annualized ×12) that shows where a change actually moves the year. CSV parsed in-browser, items in localStorage — no network calls, no upload. Adds a weighted monthly baseline per category — 50% the average of the last 12 full months, 25% the last full month, 25% the same calendar month a year ago — with the current month prorated on data coverage rather than elapsed days, so a stale export reads as stale instead of as a month of near-zero spending, and a bill tracker that separates a real recurring bill from a repeat purchase and a closed account from an overdue oneGITHUB PRIVATE
🔒 🧱 Budget Brick Wall (private — offline)
file:///Users/boren_wang/repos/budget-brick-wall/index.htmlopen on this Mac		A month of spending built as a LEGO wall, on one idea: fix a dollars-per-stud scale and the wall’s area is the budget, so you read the month by looking at it instead of reading a table. One plate per category, each belonging to a quadrant (recurring / one-off × income / spending). Bricks fall under a gravity that follows a draggable y = 0 line floating in a 2-stud gap between the one-off pile and the recurring pile — above it a brick rises, below it falls, and moving the line re-settles everything you are not holding, which is how a “what if this were recurring?” question gets answered by dragging rather than by editing a spreadsheet. Compact breaks bricks apart so the fragments fall into gaps and 1×1 fills whatever is left, so a plate’s height is an honest reading of its total rather than an artefact of packing. Drop a brick on a pile and the others squeeze out of its way. Right-click to break a brick down or merge it; box-select, shift-add, drag a selection, copy / cut / paste at the cursor, undo & redo, auto-arrange, zoom-to-plate. Configurable brick sizes in the bin (W×H+N adds N studs to the bottom row — 1×2+1 is the 3-stud L). Below the wall: headline numbers, a budget table with palette presets and per-category colour, ranked categories, and a my data vs national benchmark comparison. Scale, method and what is deliberately not on the wall are written out. Single self-contained HTML file — no network calls, profile and layout in localStorageGITHUB PRIVATE
🔐 Cryptography & Security CS 361
TopicDescriptionStatus
RSA by HandColored, step-by-step worked example — encoding "EVE" → "JVJ" with primes 5 & 7 (n=35, e=5, d=29), then decoding it backLIVE
🎮 Recess — Games & Fun PE 100
GameDescriptionStatus
Catch BigfootBrowser gameLIVE
RoadblocksBrowser gameLIVE
grumPy WorMFlappy-worm PWM game (also in Analog Ch. 8)LIVE
Lake FulmoreTrip pageLIVE
🏕️ Inks Lake CampingTrip page: zoomed site map, Austin route map, Halloween weekend planLIVE
Campsite MoviesMovie picker for campingLIVE
🐣 Austin Baby ChicksWhere to buy baby chicks near Austin — Leaflet map, verified Saturday hours & drive-time comparisonLIVE
Piano TheoryMusic theory toyLIVE
🟧 Tile Pixel Painter — 5×5 LED Tile GridPaint the LED windows of a photographed 5×5 magnetic tile grid: palette, presets, daylight & LED-brightness relighting, and copyable hex/JSON pattern codeLIVE GITHUB PUBLIC
🖨️ 3D Print STL CollectionCurated printable STL models & source linksLIVE
LEGO SPIKE Prime — Project IdeasPick-your-build gallery of 25 SPIKE Prime robot designs & advanced builds, each linking to instructionsLIVE
💻 Digital Circuit Design EE 141
TopicDescriptionStatus
3-bit PRBS — Why the Feedback Gate Must Be XORWalks a 3-bit LFSR state by state to show why the feedback gate has to be XOR: XOR is the only linear (self-inverse over GF(2)) two-input gate, which is exactly what makes primitive-polynomial theory — and its 2N−1 maximal-length guarantee — apply. AND/OR feedback is not forbidden, just unpredictable: no theorem to lean on and lock-up states are common. Includes the difference-tracking tables, tap-choice discussion, and the 000 absorbing-state caveat.LIVE GITHUB PUBLIC
🔌 74HCxx / 74LSxx IC Kit — Pinout & Function Reference (PDF)A 25-page bench reference for the 22 DIP logic parts in the Minidodoca 74HCxx/74LSxx kit — 74HC00/02/04/08/14/32/74/138/164/165/595 and 74LS00/02/04/08/32/47/74/86/90/138/164/245, in DIP-14, DIP-16 and DIP-20. Every part gets the same four blocks: a pinout drawn top view (notch up, pin 1 top-left, numbering counter-clockwise — the way the chip actually sits in a breadboard, so the drawing can be read without mentally flipping it), an at a glance summary, a function diagram of what is inside (real gate-level SVG schematics with package pin numbers in circles, active-low bubbles and overbars, and IEC C1/1D clock notation on the flip-flops), and the logic tables. Power pins are drawn where they really are rather than assumed at the corners — the 74LS90 puts VCC on pin 5 and GND on pin 10, which is the kind of thing that costs a part. Opens with the two-family comparison that decides which chip you reach for: 74LS is 5 V ±5 % only, sinks ~8 mA but sources just ~0.4 mA (so an LED hangs from VCC into the pin, not from the pin to ground) and burns several mA idle; 74HC runs 2–6 V with a VCC/2 threshold, swings rail to rail at ±4 mA (±6 mA on the ’245 and ’595) and idles at near zero — but a 74HC input is not guaranteed to read a 74LS HIGH of 2.4 V, which is what the 74HCT parts exist for. Both families share the rule that an open input is a bug, not a don’t-care: it reads HIGH and picks up noise on LS, and oscillates and heats the chip on HC. Generated by a single gen.py that draws every symbol and package as SVG, so the whole book re-renders from the part list; prints to Letter portrait or saves as the bundled PDF.LIVE
📄 Page Registry page numbers
PageTitle
1GBW · Power · Area — Trade-off Triangle
2IBIS Model Builder
3Bode Plot Sandbox
4OTA Inverting Amp — Vo/Vi Explorer
5Biquad Sandbox
6Crystal Oscillator
7Ring Oscillator — Phase-Shift Model
8grumPy WorM
9gm/Id First-Order Estimator
10ESD — Protection & Debug Hub
113D Fourier Cos/Sin
12Finger Multiplication — the 6×6…10×10 trick
13Inductance Calculator (Visual)
14Transient Switch L-C
15What is S11 when shorted to GND?
16SVG Editor Lite
17Brighten EDA Dark Theme
18ESD / IO Pin Tracer (private — offline)
19Verilog Pin Mismatch Debugger (private — offline)
20Repo Summary
2140 Biohacks, Ranked
22RSA by Hand
23Catch Bigfoot
24Roadblocks
25Lake Fulmore
26Campsite Movies
27Piano Theory
28LEGO SPIKE Prime — Project Ideas
29Advanced Packaging Explorer
29MCM / Package Browser
30Inductive Crosstalk (Aggressor → Victim)
31Capacitive Crosstalk (Aggressor → Victim)
32Aggressor / Victim Info Builder
333D Print STL Collection
34SVG Editor Lite
35🟦 Parasitic Extraction (.cir / .scs) Table Viewer (private — offline)
36🐣 Austin Baby Chicks — Store Finder
373D Print Tools — Easy Support & 3D Browser
38🧩 MagTile Circuits — 1-Second LED Blinker
393D Markup + Overlay Viewer
40Feedback Divider — Frequency-Response Analyzer (README)
41✂️ 3MF Point Editor
42Miller Two-Stage Amp (1× SF + RC Pole-Splitting) — Frequency Response
43🔒 📊 Budget Timeline — Recurring vs One-time (private — offline)
44🔌 SimVision .trn → Interactive Schematic
453-bit PRBS — Why the Feedback Gate Must Be XOR
46🔒 Deny Claude Code Access to NDA / Confidential Folders
47🔒 TSMC PDK — AI Access Policy (private — internal)
48🔬 dd — Digital Discovery from the Command Line
49🔒 🔌 Push-Pull PLL — Bond Plan & Register-Write Debug (private — offline)
50🧩 Dashboard Integration Format — one launcher, one page
51🔌 74HCxx / 74LSxx IC Kit — Pinout & Function Reference
52🟧 Tile Pixel Painter — 5×5 LED Tile Grid
53Inverter Self-Bias Animation — operating point settling to VM
54LDO LDR Checklist — 15 simulation checks and load-regulation SKILL script
55RC Noise Bandwidth: where 4kTR becomes kT/C
56Inks Lake Camping: site 090 map, route from Austin, weekend plan
57🔒 Ramp-Sync Type-II Loop (private, offline)

Page numbers are permanent and append-only — a new page always takes the next number (29, 30, …), existing pages are never renumbered. Each page also shows its number in its own footer.