📋 Contents

1. Circuit & mechanism

A fast aggressor edge Vagg couples to a victim net through the mutual (coupling) capacitance C1. The aggressor drives through its source resistance R1; the victim node sees load C2 and a shunt resistance R2 = Rin ‖ Rdrv — the sense input impedance in parallel with the sense-node driver. A real Vsense node is usually actively held (buffer / reference / regulator), so the low Rdrv dominates and R2 is small. The coupling cap is a high-pass (only the edge dV/dt gets through) so the victim gets a bump — but the driver sinks the coupled charge and holds the node, so a stiffer driver (lower Rdrv) makes the bump rise fast and die fast, well below the open-node capacitive divider.

Vagg R1(agg Rout) C1AC Vvictim Rin sense in Rdrv driver holdsVsense C2
Figure 1 — aggressor Vagg couples through R1–C1 to the victim node. The node is loaded by C2 and by R2 = Rin ‖ Rdrv — the sense input resistance in parallel with the sense-node driver (buffer / reference / regulator) whose low output impedance holds Vsense.

2. First-principles

Node equation at Vvictim, aggressor branch admittance \(Y_1=\dfrac{sC_1}{1+sR_1C_1}\), load admittance \(Y_2=\tfrac1{R_2}+sC_2\). The transfer function is a band-pass (a zero at the origin, two poles):

$$\frac{V_{victim}}{V_{agg}}=\frac{Y_1}{Y_1+Y_2}=\frac{sR_2C_1}{s^2R_1R_2C_1C_2+s\,(R_2C_1+R_2C_2+R_1C_1)+1}$$

For a step aggressor \(V_{agg}=V_A\), and with well-separated time constants \(\tau_1\ll\tau_2\), the two poles give a double-exponential pulse — a fast rise (\(\tau_1\)) and a slow decay (\(\tau_2\)):

$$\boxed{\;\tau_1=R_1\,\frac{C_1C_2}{C_1+C_2}\quad(\text{fast, rise}),\qquad \tau_2=R_2\,(C_1+C_2)\quad(\text{slow, decay})\;}$$ $$V_{victim}(t)=\frac{V_A\,R_2C_1}{\tau_2-\tau_1}\Big(e^{-t/\tau_2}-e^{-t/\tau_1}\Big)$$

Setting \(\dot V_{victim}=0\) gives the peak time \(t_{pk}=\dfrac{\tau_1\tau_2}{\tau_2-\tau_1}\ln\!\dfrac{\tau_2}{\tau_1}\). Substituting back and using \(\tau_2=R_2(C_1+C_2)\) collapses the prefactor to the capacitive divider \(\alpha=\dfrac{C_1}{C_1+C_2}\), giving the closed-form victim peak:

$$\boxed{\;V_{victim,\,pk}=V_A\,\frac{C_1}{C_1+C_2}\left(\frac{\tau_1}{\tau_2}\right)^{\tau_1/(\tau_2-\tau_1)}\;}$$

As \(R_1\to0\) (so \(\tau_1\to0\)) the exponent \(\to0\), the factor \(\to1\), and the peak becomes the ideal capacitive divider reached instantaneously — the dashed reference in §3:

$$\boxed{\;V_{victim,\,pk}\big|_{R_1=0}=V_A\,\frac{C_1}{C_1+C_2}\;}$$
💡 Intuitive approximation. When R1C1 ≪ R2C2 (\(\tau_1\ll\tau_2\)) the \((\tau_1/\tau_2)^{\tau_1/(\tau_2-\tau_1)}\) factor \(\to1\) and drops out, leaving just the capacitive divider: $$V_{victim,\,pk}\;\approx\;V_A\,\frac{C_1}{C_1+C_2}\qquad\Big(\approx V_A\,\tfrac{C_1}{C_2}\ \text{ if }C_1\ll C_2\Big)$$ Why: the aggressor edge dumps charge onto the victim through C1 faster than R2 can drain it, so the node reaches the full C1–C2 divider before it decays. R1 only sets how fast it gets there (\(\tau_1\)); R2 sets how long it lingers (\(\tau_2\)); neither sets the height — the caps do.
Accuracy (always a slight over-read → conservative): ≈0.7% at \(\tau_1/\tau_2{=}10^{-3}\), ≈5% at \(10^{-2}\), ≈29% at \(0.1\). The C1/C2 form needs a genuinely small coupling cap (C1≪C2).

3. Interactive transient

Vvictim(t) on a log-time axis (so the ps rise and the ns decay both show). The solid curve is the R1-limited response; the dashed curve is the R1=0 ideal-divider reference. The τ1 marker shows the fast rise; the peak is dotted.

Figure 2 — capacitive-crosstalk transient. Solid = with R1; dashed = R1=0 ideal divider; τ1 & τ2 marked.
Design takeaway. \(V_A\,C_1/(C_1+C_2)\) is the worst case (open / weakly-held node). A real sense node is driven, so the low Rdrv makes R2 small, τ2 short, and the bump is suppressed — a stiff driver (small Rdrv) sinks the coupled charge before the node can swing. To cut crosstalk: stiffen the driver (lower Rdrv), shrink the coupling C1 (spacing / guard / shield), or raise C2. (R1 only stretches the rise τ1.)

4. Worked examples — real PCB nodes (editable via CSV import)

Realistic sense nodes. C1 = AC-coupling / trace-coupling cap, R1 = aggressor driver Rout. The victim shunt is R2 = Rin ‖ Rdrv — sense input impedance in parallel with the sense-node driver output impedance (Rdrv=∞ means an undriven / high-Z node), usually low so it dominates R2. Columns compare the actual victim peak (exact 2-pole solve) with the estimate Vvictim,pk est = VAC1/(C1+C2) (open-node / worst case), and the margin = (1−actual÷est)×100% (how far the driver holds the victim below the worst-case divider; 0%=undriven, →100%=strongly held).

📥 Import / export nodes (CSV) — columns node, dV(V), Rout(Ω), Cc(pF), Rin(Ω), Rdrv(Ω; inf=undriven), Cin(pF) (aliases Va→dV, R1→Rout, C1→Cc, C2→Cin, R2→Rin accepted). Engineering suffixes ok (47k, 1M, 10p). It also imports an aggressor-victim-info / inductive CSV — each aggressor is paired with each victim (Cc=1 pF, Rdrv=∞ defaults you then edit). Paste below or browse a .csv, then Load.
#nodeVAR1C1RinRdrv
driver		R2=‖C2Vvictim,pk
actual		Vvictim,pk est
VAC1/(C1+C2)		margin
vs worst-case
📈 The driver is the dominant knob. Undriven high-Z nodes (Rdrv=∞) hit the full divider; a stiff driver (sub-Ω reference/regulator) crushes the bump 10–50×. So specify the sense driver’s output impedance — not just the coupling cap — when budgeting capacitive crosstalk. Edit rows via the CSV box above.

5. Sources

  1. H. Johnson & M. Graham, High-Speed Digital Design: A Handbook of Black Magic — capacitive crosstalk, coupling-cap high-pass.
  2. Standard RC band-pass / double-exponential step response (two-pole network).
Disclaimer. AI-generated teaching model; verify formulas and values against primary sources / a field solver before use.